IP Core for Timed Petri Nets
In this article, we present a Timed Petri Nets Processor which can be directly programmed using Petri Nets formalism vectors and matrixes. This processor can leverage the power of Petri Nets for modeling real-time systems and formally verify their properties, which prevent programming errors. The Petri Nets Processor was developed as an IP-core to be inserted in a Multi-Core system. Therefore, we can model the system requirements with Petri Nets, formally verifying all its properties and by using the IP-core to implement the system is possible to ensure that all properties will be met.
Saved in:
| Main Authors: | , , |
|---|---|
| Format: | conferenceObject biblioteca |
| Language: | eng |
| Published: |
2013
|
| Subjects: | Multi-Core system, Software, Hardware, Timed Petri Nets semantics, |
| Online Access: | http://hdl.handle.net/11086/28634 |
| Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
| Summary: | In this article, we present a Timed Petri Nets Processor which can be directly programmed using Petri Nets formalism vectors and matrixes. This processor can leverage the power of Petri Nets for modeling real-time systems and formally verify their properties, which prevent programming errors. The Petri Nets Processor was developed as an IP-core to be inserted in a Multi-Core system. Therefore, we can model the system requirements with Petri Nets, formally verifying all its properties and by using the IP-core to implement the system is possible to ensure that all properties will be met. |
|---|