Electrical Parameters Extraction of CMOS Floating-Gate Inverters

This work provides an accurate methodology for extracting the floating-gate gain factory, of CMOS floating-gate inverters with a clock-driven switch for accessing temporarilly to the floating-gate. With the methodology proposed in this paper, the γ factor and other parasitic capacitances coupled to the floating-gate can be easily extracted in a mismatch-free approach. This parameter plays an important role in modern analog and mixed-signal CMOS circuits, since it limits the circuit performance. Theoretical and measured values using two test cells, fabricated in a standard double poly double metal CMOS AMI-ABN process with 1.2 µm design rules, were compared. The extracted parameters can be incorporated into floating-gate PS pice macromodels for obtaining accurate electrical simulation.

Bibliographic Details

Main Authors:	Molinar-Solís,J.E., Ponce-Ponce,V.H., García-Lozano,R.Z., Díaz-Sánchez,A., Rocha-Pérez,J.M.
Format:	Digital revista
Language:	English
Published:	Universidad Nacional Autónoma de México, Facultad de Ingeniería 2010
Online Access:	http://www.scielo.org.mx/scielo.php?script=sci_arttext&pid=S1405-77432010000300007
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