A Low-Complexity current-mode WTA circuit based on CMOS Quasi-FG Inverters

In this paper, a low-complexity current-mode Winner-Take-All circuit (WTA) of O (n) complexity with logical outputs is presented. The proposed approach employs a Quasi-FG Inverter as the key element for current integration and the computing of the winning cell. The design was implemented in a double-poly, three metal layers, 0.5µm CMOS technology. The circuit exhibits a good accuracy-speed tradeoff when compared to other reported WTA architectures.

Saved in:
Bibliographic Details
Main Authors: Molinar Solís,Jesús Ezequiel, Sánchez Gaspariano,Luis Abraham, García Lozano,Rodolfo Zolá, Ponce Ponce,Víctor, Ocampo Hidalgo,Juan J., Molina Lozano,Herón, Díaz Sánchez,Alejandro
Format: Digital revista
Language:English
Published: Instituto Politécnico Nacional, Centro de Investigación en Computación 2011
Online Access:http://www.scielo.org.mx/scielo.php?script=sci_arttext&pid=S1405-55462011000100004
Tags: Add Tag
No Tags, Be the first to tag this record!