Design of Interconnection Networks for Programmable Logic [electronic resource] /

Programmable Logic Devices (PLDs) have become the key implementation medium for the vast majority of digital circuits designed today. While the highest-volume devices are still built with full-fabrication rather than field­ programmability, the trend towards ever fewer ASICs and more FPGAs is clear. This makes the field of PLD architecture ever more important, as there is stronger demand for faster, smaller, cheaper and lower-power programmable logic. PLDs are 90% routing and 10% logic. This book focuses on that 90% that is the programmable routing: the manner in which the programmable wires are connected and the circuit design of the programmable switches themselves. Anyone seeking to understand the design of an FPGA needs to become lit­ erate in the complexities of programmable routing architecture. This book builds on the state-of-the-art of programmable interconnect by providing new methods of investigating and measuring interconnect structures, as well as new programmable switch basic circuits. The early portion of this book provides an excellent survey of interconnec­ tion structures and circuits as they exist today. Lemieux and Lewis then provide a new way to design sparse crossbars as they are used in PLDs, and show that the method works with an empirical validation. This is one of a few routing architecture works that employ analytical methods to deal with the routing archi­ tecture design. The analysis permits interesting insights not typically possible with the standard empirical approach.

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Main Authors: Lemieux, Guy. author., Lewis, David. author., SpringerLink (Online service)
Format: Texto biblioteca
Language:eng
Published: Boston, MA : Springer US : Imprint: Springer, 2004
Subjects:Engineering., Computers., Electrical engineering., Electronic circuits., Circuits and Systems., Theory of Computation., Electrical Engineering.,
Online Access:http://dx.doi.org/10.1007/978-1-4757-4941-0
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id KOHA-OAI-TEST:225423
record_format koha
institution COLPOS
collection Koha
country México
countrycode MX
component Bibliográfico
access En linea
En linea
databasecode cat-colpos
tag biblioteca
region America del Norte
libraryname Departamento de documentación y biblioteca de COLPOS
language eng
topic Engineering.
Computers.
Electrical engineering.
Electronic circuits.
Engineering.
Circuits and Systems.
Theory of Computation.
Electrical Engineering.
Engineering.
Computers.
Electrical engineering.
Electronic circuits.
Engineering.
Circuits and Systems.
Theory of Computation.
Electrical Engineering.
spellingShingle Engineering.
Computers.
Electrical engineering.
Electronic circuits.
Engineering.
Circuits and Systems.
Theory of Computation.
Electrical Engineering.
Engineering.
Computers.
Electrical engineering.
Electronic circuits.
Engineering.
Circuits and Systems.
Theory of Computation.
Electrical Engineering.
Lemieux, Guy. author.
Lewis, David. author.
SpringerLink (Online service)
Design of Interconnection Networks for Programmable Logic [electronic resource] /
description Programmable Logic Devices (PLDs) have become the key implementation medium for the vast majority of digital circuits designed today. While the highest-volume devices are still built with full-fabrication rather than field­ programmability, the trend towards ever fewer ASICs and more FPGAs is clear. This makes the field of PLD architecture ever more important, as there is stronger demand for faster, smaller, cheaper and lower-power programmable logic. PLDs are 90% routing and 10% logic. This book focuses on that 90% that is the programmable routing: the manner in which the programmable wires are connected and the circuit design of the programmable switches themselves. Anyone seeking to understand the design of an FPGA needs to become lit­ erate in the complexities of programmable routing architecture. This book builds on the state-of-the-art of programmable interconnect by providing new methods of investigating and measuring interconnect structures, as well as new programmable switch basic circuits. The early portion of this book provides an excellent survey of interconnec­ tion structures and circuits as they exist today. Lemieux and Lewis then provide a new way to design sparse crossbars as they are used in PLDs, and show that the method works with an empirical validation. This is one of a few routing architecture works that employ analytical methods to deal with the routing archi­ tecture design. The analysis permits interesting insights not typically possible with the standard empirical approach.
format Texto
topic_facet Engineering.
Computers.
Electrical engineering.
Electronic circuits.
Engineering.
Circuits and Systems.
Theory of Computation.
Electrical Engineering.
author Lemieux, Guy. author.
Lewis, David. author.
SpringerLink (Online service)
author_facet Lemieux, Guy. author.
Lewis, David. author.
SpringerLink (Online service)
author_sort Lemieux, Guy. author.
title Design of Interconnection Networks for Programmable Logic [electronic resource] /
title_short Design of Interconnection Networks for Programmable Logic [electronic resource] /
title_full Design of Interconnection Networks for Programmable Logic [electronic resource] /
title_fullStr Design of Interconnection Networks for Programmable Logic [electronic resource] /
title_full_unstemmed Design of Interconnection Networks for Programmable Logic [electronic resource] /
title_sort design of interconnection networks for programmable logic [electronic resource] /
publisher Boston, MA : Springer US : Imprint: Springer,
publishDate 2004
url http://dx.doi.org/10.1007/978-1-4757-4941-0
work_keys_str_mv AT lemieuxguyauthor designofinterconnectionnetworksforprogrammablelogicelectronicresource
AT lewisdavidauthor designofinterconnectionnetworksforprogrammablelogicelectronicresource
AT springerlinkonlineservice designofinterconnectionnetworksforprogrammablelogicelectronicresource
_version_ 1756270845491150848
spelling KOHA-OAI-TEST:2254232018-07-31T00:05:42ZDesign of Interconnection Networks for Programmable Logic [electronic resource] / Lemieux, Guy. author. Lewis, David. author. SpringerLink (Online service) textBoston, MA : Springer US : Imprint: Springer,2004.engProgrammable Logic Devices (PLDs) have become the key implementation medium for the vast majority of digital circuits designed today. While the highest-volume devices are still built with full-fabrication rather than field­ programmability, the trend towards ever fewer ASICs and more FPGAs is clear. This makes the field of PLD architecture ever more important, as there is stronger demand for faster, smaller, cheaper and lower-power programmable logic. PLDs are 90% routing and 10% logic. This book focuses on that 90% that is the programmable routing: the manner in which the programmable wires are connected and the circuit design of the programmable switches themselves. Anyone seeking to understand the design of an FPGA needs to become lit­ erate in the complexities of programmable routing architecture. This book builds on the state-of-the-art of programmable interconnect by providing new methods of investigating and measuring interconnect structures, as well as new programmable switch basic circuits. The early portion of this book provides an excellent survey of interconnec­ tion structures and circuits as they exist today. Lemieux and Lewis then provide a new way to design sparse crossbars as they are used in PLDs, and show that the method works with an empirical validation. This is one of a few routing architecture works that employ analytical methods to deal with the routing archi­ tecture design. The analysis permits interesting insights not typically possible with the standard empirical approach.1. Introduction -- 2. Interconnection Networks -- 3. Models, Methodology and CAD Tools -- 4. Sparse Crossbar Design -- 5. Sparse Cluster Design -- 6. Routing Switch Circuit Design -- 7. Switch Block Design -- 8. Conclusions -- Appendices -- A Switch Blocks: Reduced Flexibility -- A.1 Introduction -- A.4 Results -- A.5 Summary -- B Switch Blocks: Diverse Design Instances -- C VPRx: VPR Extensions -- C.1 Determination of Router Effort -- C.2 Routing Graph and Netlist Changes (Sparse Clusters) -- C.3 Area and Delay Calculation Improvements -- C.4 Runtime Improvements -- C.5 Experimental Noise Reduction -- C.6 Correctness Changes -- References.Programmable Logic Devices (PLDs) have become the key implementation medium for the vast majority of digital circuits designed today. While the highest-volume devices are still built with full-fabrication rather than field­ programmability, the trend towards ever fewer ASICs and more FPGAs is clear. This makes the field of PLD architecture ever more important, as there is stronger demand for faster, smaller, cheaper and lower-power programmable logic. PLDs are 90% routing and 10% logic. This book focuses on that 90% that is the programmable routing: the manner in which the programmable wires are connected and the circuit design of the programmable switches themselves. Anyone seeking to understand the design of an FPGA needs to become lit­ erate in the complexities of programmable routing architecture. This book builds on the state-of-the-art of programmable interconnect by providing new methods of investigating and measuring interconnect structures, as well as new programmable switch basic circuits. The early portion of this book provides an excellent survey of interconnec­ tion structures and circuits as they exist today. Lemieux and Lewis then provide a new way to design sparse crossbars as they are used in PLDs, and show that the method works with an empirical validation. This is one of a few routing architecture works that employ analytical methods to deal with the routing archi­ tecture design. The analysis permits interesting insights not typically possible with the standard empirical approach.Engineering.Computers.Electrical engineering.Electronic circuits.Engineering.Circuits and Systems.Theory of Computation.Electrical Engineering.Springer eBookshttp://dx.doi.org/10.1007/978-1-4757-4941-0URN:ISBN:9781475749410