A Low-Complexity current-mode WTA circuit based on CMOS Quasi-FG Inverters

In this paper, a low-complexity current-mode Winner-Take-All circuit (WTA) of O (n) complexity with logical outputs is presented. The proposed approach employs a Quasi-FG Inverter as the key element for current integration and the computing of the winning cell. The design was implemented in a double-poly, three metal layers, 0.5µm CMOS technology. The circuit exhibits a good accuracy-speed tradeoff when compared to other reported WTA architectures.

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Main Authors: Molinar Solís,Jesús Ezequiel, Sánchez Gaspariano,Luis Abraham, García Lozano,Rodolfo Zolá, Ponce Ponce,Víctor, Ocampo Hidalgo,Juan J., Molina Lozano,Herón, Díaz Sánchez,Alejandro
Format: Digital revista
Language:English
Published: Instituto Politécnico Nacional, Centro de Investigación en Computación 2011
Online Access:http://www.scielo.org.mx/scielo.php?script=sci_arttext&pid=S1405-55462011000100004
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spelling oai:scielo:S1405-554620110001000042012-02-01A Low-Complexity current-mode WTA circuit based on CMOS Quasi-FG InvertersMolinar Solís,Jesús EzequielSánchez Gaspariano,Luis AbrahamGarcía Lozano,Rodolfo ZoláPonce Ponce,VíctorOcampo Hidalgo,Juan J.Molina Lozano,HerónDíaz Sánchez,Alejandro Winner-take-all neural networks analog circuits In this paper, a low-complexity current-mode Winner-Take-All circuit (WTA) of O (n) complexity with logical outputs is presented. The proposed approach employs a Quasi-FG Inverter as the key element for current integration and the computing of the winning cell. The design was implemented in a double-poly, three metal layers, 0.5µm CMOS technology. The circuit exhibits a good accuracy-speed tradeoff when compared to other reported WTA architectures.info:eu-repo/semantics/openAccessInstituto Politécnico Nacional, Centro de Investigación en ComputaciónComputación y Sistemas v.14 n.3 20112011-03-01info:eu-repo/semantics/articletext/htmlhttp://www.scielo.org.mx/scielo.php?script=sci_arttext&pid=S1405-55462011000100004en
institution SCIELO
collection OJS
country México
countrycode MX
component Revista
access En linea
databasecode rev-scielo-mx
tag revista
region America del Norte
libraryname SciELO
language English
format Digital
author Molinar Solís,Jesús Ezequiel
Sánchez Gaspariano,Luis Abraham
García Lozano,Rodolfo Zolá
Ponce Ponce,Víctor
Ocampo Hidalgo,Juan J.
Molina Lozano,Herón
Díaz Sánchez,Alejandro
spellingShingle Molinar Solís,Jesús Ezequiel
Sánchez Gaspariano,Luis Abraham
García Lozano,Rodolfo Zolá
Ponce Ponce,Víctor
Ocampo Hidalgo,Juan J.
Molina Lozano,Herón
Díaz Sánchez,Alejandro
A Low-Complexity current-mode WTA circuit based on CMOS Quasi-FG Inverters
author_facet Molinar Solís,Jesús Ezequiel
Sánchez Gaspariano,Luis Abraham
García Lozano,Rodolfo Zolá
Ponce Ponce,Víctor
Ocampo Hidalgo,Juan J.
Molina Lozano,Herón
Díaz Sánchez,Alejandro
author_sort Molinar Solís,Jesús Ezequiel
title A Low-Complexity current-mode WTA circuit based on CMOS Quasi-FG Inverters
title_short A Low-Complexity current-mode WTA circuit based on CMOS Quasi-FG Inverters
title_full A Low-Complexity current-mode WTA circuit based on CMOS Quasi-FG Inverters
title_fullStr A Low-Complexity current-mode WTA circuit based on CMOS Quasi-FG Inverters
title_full_unstemmed A Low-Complexity current-mode WTA circuit based on CMOS Quasi-FG Inverters
title_sort low-complexity current-mode wta circuit based on cmos quasi-fg inverters
description In this paper, a low-complexity current-mode Winner-Take-All circuit (WTA) of O (n) complexity with logical outputs is presented. The proposed approach employs a Quasi-FG Inverter as the key element for current integration and the computing of the winning cell. The design was implemented in a double-poly, three metal layers, 0.5µm CMOS technology. The circuit exhibits a good accuracy-speed tradeoff when compared to other reported WTA architectures.
publisher Instituto Politécnico Nacional, Centro de Investigación en Computación
publishDate 2011
url http://www.scielo.org.mx/scielo.php?script=sci_arttext&pid=S1405-55462011000100004
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