A Low-Complexity current-mode WTA circuit based on CMOS Quasi-FG Inverters
In this paper, a low-complexity current-mode Winner-Take-All circuit (WTA) of O (n) complexity with logical outputs is presented. The proposed approach employs a Quasi-FG Inverter as the key element for current integration and the computing of the winning cell. The design was implemented in a double-poly, three metal layers, 0.5µm CMOS technology. The circuit exhibits a good accuracy-speed tradeoff when compared to other reported WTA architectures.
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Main Authors: | , , , , , , |
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Format: | Digital revista |
Language: | English |
Published: |
Instituto Politécnico Nacional, Centro de Investigación en Computación
2011
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Online Access: | http://www.scielo.org.mx/scielo.php?script=sci_arttext&pid=S1405-55462011000100004 |
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Summary: | In this paper, a low-complexity current-mode Winner-Take-All circuit (WTA) of O (n) complexity with logical outputs is presented. The proposed approach employs a Quasi-FG Inverter as the key element for current integration and the computing of the winning cell. The design was implemented in a double-poly, three metal layers, 0.5µm CMOS technology. The circuit exhibits a good accuracy-speed tradeoff when compared to other reported WTA architectures. |
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